Introduction of basic categories of analogue linear and non-linear circuits. Area of application and their specifications, like frequency range.
Comparison of analogue and mixed-signal testing to digital testing and current status.
Tolerance boxes and measurement inaccuracies.
Overall organization of the tutorial.
Translation of physical defects in CMOS technology into catastrophic and parametric faults.
The influence of physical defects and layout resulting in a realistic fault set using Inductive Fault Analysis (IFA). Illustration by an example.
The possibilities and limitations of high-level analogue modelling.
Test generation and fault simulation
The conventional functional (specification-based) test approach.
The more advanced structural/fault-model based test-generation algorithms. Test selection and optimalization. Examples of both approaches, advantages and disadvantages.
The promising mixed functional/structural approach.
Analogue fault simulators for linear & non-linear circuits.
Behavioural and macro modelling of analogue blocks for efficient fault simulation.
Testability Analysis and Design-for-Test (DfT) Approaches
Several approaches towards testability analysis, e.g. by means of sensitivity analysis. Simulation examples to illustrate the proper insertion of test points.
Different forms of gaining access to embedded analogue macros/cores.
The macro-based testing approach. Transparent macro testing.
Digitally-controlled analogue multiplexer approaches and analogue test busses.
Power-current Iddx test approaches for analogue circuits.
Several examples of macro tests, Design-for-Test (DfT) designs and
Testable Design & Test of Stand-Alone Analogue Chips & Embedded Cores
Coherent and non-coherent testing
Testing of data converters (ADC and DAC)
Testing of Phase Locked Loop (PLL) chips
Analogue boundary-scan (1149.4) and mixed-signal core-based (P1500.?) system testing. General architecture set-up, the analogue Test Access Port (controller/instructions), the Test-Bus Interface Circuit.
Analogue Boundary-Scan Cell designs. Their limitations in an analogue high-performance environment. Illustration by means of examples.
Built-In Self-Test of Analogue Macros
Built-in Self-Test (BIST) of analogue macros and systems.
On-chip signal generation: single-tone and multi-tone oscillators using delta-sigma modulators.
On-board non-sinusoidal signal generators and pseudo DC approach.
On-chip signal evaluation: integration/signature approaches, power-current related approaches. Oscillation-based methods.
The usage of Digital Signal Processing (DSP) techniques in a MADBIST environment.
RF Testing of Analogue Cores
Introduction to Radio Frequency (RF) testing of analogue macros/cores.
Testing of amplifiers, VCOs and mixers.
State-of-the-art test-bench approaches and important measurement parameters.
Test-point insertion and interface design.
The problem of measurement errors and calibration steps.
Analogue System Testing
Mixed-Signal Multi-Chip Module Testing
Mixed-signal ATE and available advanced DSP techniques for evaluating analogue circuits.
The importance of Design-to-Test links. Illustration by means of an example.
Click for a slide example of the PowerPoint presentation of the course analogue & mixed-signal testable design and testing
The course consists of 8 modules. Each module takes between 1 to 3 hours. Also a single or a combination of modules can be provided, depending on the specific requirements. If single modules are requested, basic knowledge on testable design and test is assumed.